The invention relates to a transmitting device and a bus system for the serial data transfer of binary data between at least two communication stations, which are coupled to one another via a single bus line.
Such a bus system which is suitable for the serial transfer of binary data may be a CAN bus system (CAN=controller area network), for example. A CAN bus system of this type is described, for example, in German published patent application DE 195 230 31 A1.
A bus system for the transfer of data between different communication stations, coupled to a differential dual-wire bus, by means of push-pull signals is specified in the above document. The physical coupling to the dual-wire bus is effected via a transmitting/receiving device, the so-called transceiver (combined terms xe2x80x9ctransmitterxe2x80x9d and xe2x80x9creceiverxe2x80x9d), contained in each communication station. The transceiver transmits and receives data via the bus.
The transmitting device of the transceiver circuit can significantly influence the edge form of the signal to be coupled into the bus. If the bus signals on the bus are driven at a sufficiently high frequency, then as the frequency increases, an increase is likewise observed in the electromagnetic radiation. Equally, the frequency spectrum of the electromagnetic radiation is widened if the edge steepness of the bus signals coupled into the bus system increases. However, high electromagnetic radiation and, consequently, low electromagnetic compatibility (EMC) have an interfering effect on other assemblies. It is desirable, therefore, to keep the electromagnetic radiation in a bus system as low as possible.
In order to reduce the electromagnetic radiation in dual-wire or multiple-wire bus systems, such as, for example, the dual-wire CAN bus, the (two) bus cores are twisted together. The electromagnetic radiation is largely compensated for by the twisting of the bus lines (twisted pair).
For cost reasons, it is often more favorable to use a bus system having only a single bus line. Such a bus system is, by way of example, the single-wire CAN bus. On the other hand, such single-wire buses have the disadvantage that the electromagnetic radiation cannot be compensated for by twisting as in the case of two-core or multiple-core bus systems.
In order to reduce the electromagnetic radiation, bus systems of this type are connected up to passive components. However, this measure improves the electromagnetic radiation only inadequately and, moreover, reduces the bandwidth of the bus system.
So-called xe2x80x9cslew rate limiterxe2x80x9d circuits are known as a further measure for reducing the electromagnetic radiation. These circuits effect simple leveling off of the edges of the square-wave bus signals to form trapezoidal signals. This measure considerably reduces the spectrum of the radiated electromagnetic radiation as compared with the passive measures mentioned above.
In order to obtain a further reduction in the spectral components of the electromagnetic radiation, the corners of the trapezoidal bus signal thus produced can be additionally rounded by the targeted incorporation of resistance-capacitance time constants.
Although a considerable reduction in the electromagnetic radiation is discernible as a result of the above-mentioned measures, a considerable spectrum of undesirable electromagnetic radiation nonetheless remains.
Taking this prior art as a departure point, the object of the present invention, therefore, is to specify a single-wire bus system of the generic type in which it is possible to obtain a further reduction in the electromagnetic radiation.
With the foregoing and other objects in view there is provided, in accordance with the invention, a transmitting device for a serial data transfer of binary data between a plurality of communication stations connected via a single bus line, comprising:
a circuit for edge form setting having an input receiving a data signal to be transmitted and an output;
the circuit generating an output signal from the data signal received at the input, by approximating respective rising and falling edges of the output signal to a curve profile of a sine function having a rising half-wave and a falling half-wave, and thereby approximating one of the rising and falling edges to the rising sine half-wave and the respective other of the rising and falling edges to the falling sine half-wave.
In accordance with an added feature of the invention, the sine half-waves are derived from a function (cos x)2, where x designates an angle in radians.
In other words, the object of the invention are attained with the transmitting device that includes the novel circuit for edge form setting. The circuit generates an output signal from a data signal to be transmitted, the rising and falling edges of which output signal are approximated to the curve profile of a sine function and the edges are approximated to the rising sine half-wave and to the falling sine half-wave, respectively.
Such output signals having edges in the form of a sine half-wave have a particularly low harmonic content. In theory, to be precise, they have only the fundamental. In this way, it is advantageously possible to reduce radiation of or irradiation by undesirable electromagnetic radiation to a minimum in a single-wire bus system by providing a circuit for edge form setting according to the invention.
The intention, therefore, is for the edges of the output signals to be transferred via the bus to be approximated to the form of a sinusoidal function. In this case, the rising sine half-wave is respectively simulated for the rising edge and the falling sine half-wave is respectively simulated for the falling edge. In negative logic, a rising edge generates a falling sine half-wave, while a falling edge respectively generates a rising sine half-wave.
In this context, the rising sine half-wave is to be understood as the region of the sinusoidal wave between its minimum and its maximum. The falling sine half-wave, on the other hand, is to be understood as the region of the sinusoidal wave between its maximum and its minimum. The sinusoidal function is to be understood to mean any function derived from a sine function or from a cosine function. It is particularly advantageous if the function (cos x)2 is chosen as the sinusoidal function.
In accordance with an additional feature of the invention, the circuit for edge form setting includes a clock generator, a counter device connected to the clock generator, and a converter connected to the counter device;
the clock generator generating a clock signal from the data signal to be transmitted, and outputting the clock signal to the counter device;
the counter device generating a counter reading signal in clocked fashion; and
the converter generating an analog signal derived from the counter reading signal and having stepped edges.
The clock generator is typically an oscillator and generates a clock signal. The clocked counter device connected downstream, for example an up-down counter, continuously counts the coupled-in clock pulses of the oscillator and feeds a counter reading signal derived from the number of coupled-in clock pulses to the converter connected downstream. The converter, which is usually a digital-to-analog converter (D/A converter), generates, proceeding from the counter reading signal, an analog signal having stepped clock edges. The stepped edges of the analog signal, which can be picked off at the output of the D/A converter, simulate the half-wave of a sinusoidal curve better, the greater the data depth or bit width of the up-down counter or of the D/A converter connected downstream is chosen to be.
In accordance with another feature of the invention, the converter includes a voltage divider with a plurality of reference resistors, and the step height of the individual stepped edges of the analog signal is set by a dimensioning of individual reference resistors of the voltage divider. The stepped clock edges in the analog signal simulate the sinusoidal half-wave as optimally as possible when the individual steps do not have the same step height as far as possible. The optimum setting of the respective step heights and, consequently, the optimization of the sinusoidal half-wave of the clock edges can be set by means of suitable dimensioning of the reference elements of the voltage divider of the D/A converter.
The use of a parallel D/A converter is particularly advantageous in this case. This D/A converter has a voltage divider with a multiplicity of reference resistors, to the inputs of which the respective counter reading of the counter device connected upstream is fed. In this case, the reference resistors should be set such that the output values of the D/A converter correspond to the corresponding discrete value on the sinusoidal half-wave. When dimensioning the reference resistors, it must be ensured, in particular, that as the counter reading advances, the respective step height should progressively increase until the counter reading center point is reached, the counter reading center point corresponding to the point of inflection of the sinusoidal half-wave. From the counter reading center point, the step heights of the analog signal should then correspondingly decrease once more. Consequently, the sinusoidal half-wave can be simulated in a simple manner by way of the dimensioning of the reference resistors.
It would also be possible, of course, to realize the D/A converter in a different manner. As an alternative, although much more complicated in terms of circuitry, a load resistor with switchable, controllable current sources would be conceivable as the D/A converter. The reference elements are then formed by current sources which, for example as controllable transistors, form a diode network. The dimensioning of the reference elements and, consequently, the generation of the optimum step heights in the output signal of the D/A converter could then be effected by way of the W/L ratios of the transistors.
In accordance with a further feature of the invention, there is provided a smoothing filter for smoothing the stepped edges of the analog signal connected on an output side of the converter. The smoothing filter is particularly advantageous and, in the preferred embodiment it is a low-pass filter. The steps in the clock edges of the analog signal can be filtered out by means of suitable dimensioning of the filter elements. What is then produced is a continuous, analog output signal which is optimally approximated to the sinusoidal half-wave.
In accordance with again an added feature of the invention, there is provided an amplifier device with a feedback path for signal amplification of the output signal connected on an output side of the converter, i.e., downstream of the converter in a signal path, specifically downstream of the D/A converter and the smoothing filter. The amplifier device, which is preferably an analog operational amplifier, amplifies the output signal, to be driven on the bus, with a suitable gain. In a special operating mode, the so-called wake-up mode, a so-called wake-up signal can thus be impressed on the bus line. This wake-up signal has a distinctly increased amplitude compared with the normal signal, in accordance with the amplification. This wake-up signal of a master unit wakes up all the network nodes on the bus system which were previously in the so-called sleep mode and then selectively activates them or controls them such that they attain the sleep mode again. In an advantageous manner the average current consumption of a bus system is considerably reduced by means of the wake-up mode, since all, sleeping, network nodes which are not addressed during a bus transfer remain in the current-saving sleep mode.
In accordance with again an additional feature of the invention, there is provided a variable resistor for setting an operating frequency of the clock generator connected upstream of the clock generator. Adjusting the operating frequency of the clock generator or oscillator is particularly advantageous. The variable resistor connected upstream of the clock generator enables the oscillator frequency and, consequently, the average gradient of the clock edge of the output signal to be adapted to the desired data transfer rate. Depending on the dimensioning of the variable resistor, which is usually external, a bus system data transfer rate of greater or lesser magnitude can thus be realized.
For space and cost reasons, it is advantageous if the voltage regulating device and the transmitting/receiving device, assigned thereto, of a communication station are monolithically integrated on a single semiconductor chip. It is typical for these voltage regulator modules and the transmitting/receiving device to be monolithically integrated since the technological requirements made of these modules are very similar. It is particularly advantageous if, furthermore, the microcontroller together with its assigned voltage regulating device and transmitting/receiving device are also monolithically integrated on the same semiconductor chip.
With the above and other objects in view there is also provided, in accordance with the invention, a bus system, comprising:
a plurality of communication stations;
a bus with a single bus line interconnecting the communication stations for serial data transfer of binary data between the communication stations;
at least one of the communication stations including at least one transmitting device according to the foregoing summary of the invention.
The inventive circuit for edge form setting of the signal to be transmitted is typically integrated in a transmitting device of a communication station. This transmitting device according to the invention is particularly advantageous in a bus system for data transfer.
The invention is particularly suitable in the automotive arts, i.e., in so-called CAN on-board electrical systems. In this case, a microprocessor controls the data transfer via the single-wire bus via an internal bus and a so-called CAN module, which contains the corresponding CAN protocol, via the transceiver circuit.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a transmitting device and bus system for data transfer, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.